The chip production process is very complex. Briefly, it includes: specification definition, architecture selection, logic design, circuit design, wiring, manufacturing, testing, packaging, and final testing.

The most important aspects are circuit design and manufacturing, and the chip manufacturing process best reflects a company's technological level.

In the years after Kilby invented the chip, RCA developed the MOS transistor. In 1962, based on Fairchild's silicon planar bipolar process, RCA developed the MOS silicon planar process.

Compared with bipolar chips, MOS chips have the advantages of low power consumption, simple structure, high integration, and high yield.

In 1963, the CMOS chip process of silicon planar technology was also developed. Soon, CMOS chip technology became the mainstream of the chip industry. Today, more than 90% of chips are manufactured using silicon planar CMOS chip technology.

From the development history of chips, the development direction of chips is high speed, high frequency, and low power consumption.

Therefore, CMOS chips are the preferred choice. Currently, the most advanced CMOS chip process technology has reached 7 nanometers, which is equivalent to the size of 28 silicon dioxide molecules.

The CMOS chip process is extremely complex, and the equipment used often costs hundreds of millions of dollars. However, because the profit brought by chips is very large, many companies and institutions are still willing to invest in the chip manufacturing industry.

Four Major Processes of Chip Technology

The CMOS chip process can be divided into front-end manufacturing (including wafer processing and wafer testing) and back-end manufacturing (including packaging and testing).

Wafer processing: This involves fabricating electronic devices (such as CMOS, capacitors, logic gates, etc.) and circuits on silicon wafers. This process is extremely complex and requires significant investment. Taking microprocessors as an example, the manufacturing process can involve hundreds of steps, requiring advanced and expensive processing equipment, often costing tens of millions of dollars per unit.

The requirements for the cleanroom manufacturing environment are extremely stringent, with strict control of temperature, humidity, and dust content.

Although the manufacturing processes for various products are slightly different, the basic processes generally involve cleaning the wafer, then oxidation and deposition, followed by repeated photolithography, etching, thin film deposition, and ion implantation processes, finally forming the circuit on the wafer.

Wafer testing: Electrical testing performed on the wafer after completion.

Generally, only one type of product is on a wafer. Each die will be tested one by one, and unqualified dies will be marked. Then, the wafer will be cut into individual dies, die by die.

Chip packaging: Using plastic or ceramic to package the die and wiring to form a product; the purpose is to add a protective layer to the manufactured circuit to prevent it from being mechanically scratched or damaged by high temperatures.

Final testing: Testing the packaged chips to ensure their yield.

The following is a cross-sectional view of a CMOS chip and the corresponding process.

     Cross-sectional view of a CMOS chip and corresponding process steps - Excerpt from "Chips Change the World" by Qian Gang

1—Define double well 2—Define isolation shallow trench 3—Define gate oxide layer and gate 4—Define source/drain shallow junction 5—Define gate oxide silicon sidewall 6—Define source/drain region 7—Define source/drain alloy region

　8—Define oxide layer and source/drain connecting metal layer 0 9—Define isolation layer 1 and connection of metal layers 0 and 1 10—Define metal layer 1 11—Define isolation layer 2 and connection of metal layers 1 and 2 12—Define isolation layer 3, metal layer 2 and connection of metal layers 2 and 3

13—Define isolation layers 4 and 5, metal layers 3 and 4 and their connections 14—Define lead frame and outer insulation

Six Major Steps in Chip Manufacturing

Chip manufacturing generally has six important steps: 1. Photolithography; 2. Ion Implantation; 3. Diffusion

4. Deposition; 5. Etch; 6. Chemical Mechanical Polishing (CMP)

These six steps are repeatedly used in the chip manufacturing process to fabricate various different devices on the silicon wafer, and then connect the finished devices into circuits through metal deposition.

   Chip manufacturing process - Excerpt from "Chips Change the World" by Qian Gang

1. Photolithography: Similar to traditional photography, photoresist is first applied to the wafer, then the mask is exposed, the photoresist is developed, and then the exposed area is etched.

Thus, etching or ion implantation areas are left on the wafer. Photolithography is mainly used to define geometric patterns on silicon wafers (see Figure 14-3).

Schematic diagram of the photolithography process: 1) ZnO to be etched is deposited on SiO2/Si substrate 2) Coating 3) Exposure 4) Development 5) Etching 6) Cleaning - Excerpt from "Chips Change the World" by Qian Gang

2. Ion implantation. Ion implantation is to use the wafer as an electrode, apply a high voltage between the ion source and the wafer, so that the doped ions will be implanted into the wafer with very high energy, forming N or P type regions on the wafer.

After ion implantation, the wafer must be annealed at a high temperature to repair the damage to the wafer after ion implantation. Ion implantation is mainly used to manufacture different semiconductor regions (N region or P region, see the figure below).

         Schematic diagram of ion implantation process - Excerpt from "Chips Change the World" by Qian Gang

     Damage to silicon wafer after ion implantation - Excerpt from "Chips Change the World" by Qian Gang

3. Diffusion. Diffusion plays two roles in chip manufacturing: activating or injecting impurities into silicon wafers at high temperatures, and generating an oxide layer at temperatures between 800 and 1050℃.

Diffusion equipment schematic - From "Chips Change the World" by Qian Gang

4. Thin Film Deposition. Thin film deposition involves depositing material onto the surface of a wafer. Methods include Chemical Vapor Deposition (CVD) and Physical Vapor Deposition (PVD).

Chemical Vapor Deposition involves injecting several gases onto the silicon wafer, and the material is deposited on the wafer after a chemical reaction. Physical Vapor Deposition deposits atoms one by one onto the silicon wafer; it is a process from solid to gas and then back to solid.

Chemical Vapor Deposition (CVD) schematic - From "Chips Change the World" by Qian Gang

Physical Vapor Deposition (PVD) schematic - From "Chips Change the World" by Qian Gang

6. Etching. Etching is the selective corrosion or removal of the surface or surface-coated film of a semiconductor substrate according to mask patterns or design requirements. Etching includes wet etching and plasma etching.

Wet etching involves immersing the silicon wafer in a chemical solution to corrode the material to be removed. Plasma etching uses a high-energy plasma beam to remove the material to be removed.

Ion etching process schematic - From "Chips Change the World" by Qian Gang

6. Chemical Mechanical Planarization (CMP). To ensure that the surface of the silicon wafer remains flat after processing, the surface of the processed silicon wafer must be polished.

Chemical Mechanical Planarization (CMP) process schematic - From "Chips Change the World" by Qian Gang

 Chemical mechanical polishing equipment in operation - From "Chips Change the World" by Qian Gang

--From "Chips Change the World" by Qian Gang